An instruction set describe the Assembly instruction that your computer can understand. Your instruction set will describe how much your computer is expressive (ie. the richness of the language with whom you talk to your computer).

Famous Instruction Set

  • x86-64 (Il y a un plugin obsidian pour afficher un graphe de flow (en tant que canvas) à partir d’un fichier assembleur)
  • ARM
  • RISC

My Instruction Set v1

todo tester la fréquence maximale d’exécution de chaque instruction

Instructions using A or B share homologue instruction with immediate left and right. These instruction are suffixed with the letter L or R or the combination.

Instructions with the (opt) symbols are optional for the project. It’s a bonus if they are implemented.

ALU

CyclesInstruction(8) A(8) B(8) R(8)DescriptionImmediate
1ADD A B RR A + BLR
1SUB A B RR A - BLR
1AND A B RR A & BLR
1OR A B RR A | BLR
1NOT A _ RR ~AL
1XOR A B RR A ^ BLR
1SHIFT A B R (opt)R A >> BLR
Maybe multiplication ???

COND

CyclesInstruction(8) A(8) B(8) R(8)DescriptionImmediate
1JMP Adr(16) _Jump to the RAM address denoted by Adr (modify the PC to Adr)default for left and right
2complete conditional jump : see instructions below
1BEQ A B _Test if A = B. IF true, do nothing, ELSE Jump over the next instruction (PCPC+2). If you want to jump to a certain address only when condition is met you must follow this instruction by a JMP instruction, it will then takes two cycle to do what you want.LR
1BNEQ A B _ (opt)Same with condition A != BLR
1BLE A B _ (opt)Same with condition A BLR
1BGE A B _ (opt)Same with condition A >= BLR
1BL A B _ (opt)Same with condition A < BLR
1BG A B _ (opt)Same with condition A > BLR

CTRL

Control the behavior of the computer

CyclesInstruction(8) A(8) B(8) R(8)DescriptionImmediateBitCode
1NOP _ _ _Do nothing for one cycleNone00000000
HALT _ _ _ (opt)Stop the computer from running next instruction, maybe by cutting the clock to the PCNone
INTER (opt)todo interruption

HINT for interruption: INTER Adr(16) R Where Adr is the address of the function to call when an interrupt is triggered Where R indicate how an interrupt is triggered (eg: R XAAAAAAA X indicate wheter to detect when input goes from 0 to 1 or from 1 to 0 the A bits is a mask that indicate the pin in the input register to watch)

Memory

The RAM and STK section share the memory with one block of ram also used to store the program and used by graphic card. You must be careful when addressing in this block not to overwrite things you don’t want like the program section, the stack section or the frame buffer.

RAM

CyclesInstruction(8) A(8) B(8) R(8)DescriptionImmediate
4complete load from RAMsee instruction below
1LDa Adr(16) RLoad data from RAM to R register. Because registers are only 8 bits, if you want to load the complete data stored in the RAM, you must write 4 instructions (LDa Adr reg1; LDb Adr reg2; LDc Adr reg3; LDd Adr reg4)default for left and right
4complete store in RAMsee instruction below
1STa Adr(16) RStore the data from register R to RAM. The same principle than LDa instruction is applieddefault for left and right

STK

todo figure and explanation for functions

CyclesInstruction(8) A(8) B(8) R(8)DescriptionImmediate
1SINIT Adr _ (opt)Store Adr in the stack pointer register (describe the beginning of the stack in memory)default for left and right
1CALL Adr _ (opt)Push current address+1 (in the PC) into the stack and jump to address Adr. Useful to call a function.default for left and right
2RET _ _ _ todo (opt)Get N (the number of arguments) with a pop. Decrement the stack pointer by N. Pop into the PCNone
1PUSH A _ _ (opt)push value into the stackL
1POP _ _ R (opt)pop value to register RNone

todo make a program that check ROM of microcode in order to prevent close-circuit and duplicated instruction.

My Instruction Set v2

The instructions are 16 bits wide. The bit 15 determines the instruction mode (Data or ALU).

The following registers are accessible :

  • A which is also the RAM address
  • V which is also the vRAM address
  • *A which is the content of the RAM at address A accessible like any other register
  • *V same for the vRAM
  • D a temporary register

Tips

Si le temps presse et que je veux quand même faire de la vidéo, je peux loger un frame buffer dans la RAM

DATA Mode

The data Mode is enabled when the bit 15 of the instruction is set to 0.

In this mode the data given in the following 15 bits is directly sent to the A register.

CyclesInstruction Pattern
Mode [15] Data [14-0]
Description
10 XA X

Note

With this technique it is only possible to transfer in one cycle numbers from 0 up to 32767 from the ROM into a register

ALU Mode

The data Mode is enabled when the bit 15 of the instruction is set to 1.

In this mode an operation specified by the opcode will be calculated using the srcA and srcB register and will be stored into the dest register.

CyclesInstruction Pattern
- Mode [15]
- opcode/condition [14-12]
- not used [11-9]
- A [8-6]
- B [5-3]
- C [2-0]
Description
11 1 xx A B COperation
C A B
11 0 xx A B xxxCondition
if PC PC + 1 if A B
The operation is given by the following table :
CodeNameDescription
000ADDAddition
001SUBSubstraction
010ANDlogical AND
011ORlogical OR
100XORexclusive logical OR
101NOTComplement (takes only the first operand)
110SHLlogical bitshift to the left
111SHRlogical bitshift to the right
The relation is given by the following table :
Code
tl eq gt
Relation
000Never
001>
010=
011>=
100<
101!=
110
111Always

The different registers are indexed with this table :

CodeRegister
000A
001*A
010V
011*V
100D
101not addressed
1100 (zero constant)
1111 (one constant)

todo réfléchir si des exclusions sont nécessaire par exemple entre les registres A et *A

Note

With this implementation, performing a jump takes 2 cycles : one for loading the jump address into A and one to perform the jump.

todo make a program that takes 16 bits and give a description of what the instruction is doing

todo interrupt, no op, multiplication, division